Magnetic memory devices, such as magnetic random access memory (MRAM) devices, use magnetic memory cells to store information. Information is stored in a magnetic memory cell as the orientation of the magnetization of a free layer (FL) in the magnetic memory cell as compared to the orientation of the magnetization of a pinned layer (PL) in the magnetic memory cell. The magnetization of the FL may be oriented parallel or anti-parallel to the PL, representing either a logic “0” or a “1.” One type of memory cell, a magnetic tunnel junction (MTJ), comprises a FL and a PL separated by a tunnel barrier, which typically comprises aluminum oxide.
The resistance of the device depends on the direction of magnetization of the FL relative to the direction of magnetization of the PL. Thus, the state of the device can be sensed by measuring its resistance.
Magnetic memory devices are described, for example, in U.S. Pat. No. 5,640,343 issued to Gallagher et al., entitled “Magnetic Memory Array Using Magnetic Tunnel Junction Devices in the Memory Cells” (hereinafter “Gallagher”), the disclosure of which is incorporated by reference herein. Specifically, Gallagher describes a technique comprising a mutually perpendicular array of metal wires with an MTJ placed at the intersection of two wires. An MTJ of interest may be uniquely addressed in the array by the two wires that intersect over it. See, for example, W. Reohr et al., Memories of Tomorrow, IEEE CIRCUITS & DEVICES MAGAZINE pgs. 17-27 (September 2002), S. Tehrani et al., Magnetoresistive Random Access Memory Using Magnetic Tunnel Junctions, 91 PROC. OF THE IEEE, pgs. 703-714, No. 5 (May 2003), B. N. Engel et al., The Science and Technology of Magnetoresistive Tunneling Memories, 1 IEEE TRANS. ON NANOTECH., pgs. 32-38, No. 1 (March 2002) and A. R. Sitaram et al., A 0.18 μm Logic-based MRAM Technology for High Performance Nonvolatile Memory Applications, PROC. OF THE VLSI SYMPOSIUM 2003, the disclosures of which are incorporated by reference herein.
Typically, an MTJ stack is only a few hundred Angstroms thick and the successive metal wires that sandwich the MTJs are made from standard Back End of Line (BEOL) processing that is compatible with Complimentary Metal-Oxide Semiconductor (CMOS) fabrication. The metal wires typically need to be separated from each other by a greater distance than the thickness of the MTJ between them, in order to prevent inter-level shorts and to minimize their inter-layer capacitance. Several techniques have been employed to achieve proper separation of the metal wires.
For example, a metal stud located on the top of an MTJ can aid in spatially separating the metal wires from each other, while at the same time providing an electrical connection to the MTJ. According to this technique, the metal stud may also act as a hardmask during patterning of the MTJ. This approach, however, has several notable drawbacks. Etching of the metal stud involves the use of polymer(s) for sidewall passivation, which is difficult to remove from metal surfaces. As a result, performance limitations from the presence of ill-defined polymeric films can be expected in mass production. Further, it is hard to regulate the shape of the MTJ because it is defined, at least in part, by the shape of the metal stud, which is difficult to control in a long duration etch through a thick material.
Another approach involves employing a thin hardmask/cap layer on top of the MTJ and connecting the metal wire above the MTJ to the MTJ, by one or more vias extending downward from the metal wire to the thin hardmask/cap layer. This approach, however, also has several disadvantages, most notable of which is that, as the dimensions of MTJs decrease (as is the current trend), it becomes increasingly more difficult to properly align the via over the MTJ. Misaligned vias can result in shorting of the device.
Accordingly, there is a need for improved magnetic device configurations and techniques for the production thereof, wherein proper alignment of the metal wires with the MTJ is achieved, while at the same time maintaining proper spatial separation between the wires.